Lots of new delay pedals coming out

[Skreddy]

For some reason, when the Princeton Technologies PT2399 chip made its splash in the DIY scene, it was basically ignored by the commercial sector (edit: I think the Danecho used this chip, though; so it wasn't really ignored, yeah?). Honestly, I never gave it much thought and never built my own version of the "Rebote," et al. But for some reason, I looked into the specs of this chip last year and "discovered" that it has some damn fine potential! Did you know that it samples at about 2 megahertz? This is the very same type of technology I had been touting as "the next big thing" in digital audio (delta sigma and DSD) in my Digital Sucks page, and I didn't even see it before.

So, sure; I guess there may be a few new delays coming out that are influenced by the DIY builds. I'm thinking that a lot of them, though, are more products of that "whoa!" phenomenon I experienced when I first read the spec sheet of the chip.

So lots of new delays are coming out or have come out. But I bet ya, they'll all have a very distinct quality imbued by their makers. Mad Professor has a Deep Blue delay. Scotty at Pro Analog is coming out with a dual version (2 chips!! 2 different delay times! Very clean sound I anticipate.) Earthquaker devices has one out now. I'm coming out with one in the very near future.

It's very good times for delay lovers. There will be lots of cool toys to try out, and each will undoubtedly have its own unique set of features and personality. Eventually I hope to see information about many of these new generation of delays compiled and compared. Until then, we have an exciting frontier to explore.

[noelgrassy]

Does this technology allow 1Kms with just one chip?

[Brian Marshall]

hey all

The pt2399 doesn't necissarilly sample at 20mhz. It has a 10 bit 44Kbyte delay line. I'm not sure if they count a byte as 10 bits or as 8, but I'm willing to bet it's 8 just so they can say it has more RAM. Much like an analog delay, or older digital delays the clock rate is varried to acheive different delay times. The main difference is that the clock in the PT2399 is internal, where as most older delays it is external. Most newer digital delays run a clock and sample rate that is constant, and vary the length of the delay line to vary the delay time... of course when you change the delay time this means it would need to either simple drop or add data, or compress or expand the data it already has. a lot of these delays will sound like they are very confused if you try to change the delay time while playing.

Anyways, at a 20mhz sample rate it's a very short delay on the 2399. The clock actually runs much faster. I think it tops out around 24mhz. Perhaps there are 10 clock cycles per sample... the math works out close to that. Possibly the bits are sent down the line in serial order rather than parallel, and the extra clock cycles allow the ADC and DAC's to do their job correctly. That would certainly save some money on the manufacture of the chip, and allow it to fit in to a smaller space... and clocks running well in to the Mhz range are cheap and easy these days. OR, maybe it's for oversampling, but i'd doubt that in a chip like this.

Now you would think with 44K RAM it would do a full second of delay easilly, and still be CD quality, at least for the sample rate, but not the bit depth.

You can make it run well past one second of delay time, but it starts getting very distorted. I don't think this is a sample rate, or a bit depth issue. The IC wasn't really designed to go much past 350ms. I think the artifacts come from a bleed through of the clock or something that DAC is doing on it's analog output, which would normally be filtered out at higher sample rates.

There is a lot that can be done with this chip. It is a very well thought out IC. Easy to design stuff around. That said, i wish there was a published internal schematic that was more complete than the ones available. I think there may be other possibilities waiting to be uncovered.

As far as our echobox goes, if i drew influence from anywhere it was the PT80 diy project. I built one a few years ago, and thought it was alright. I really didn't like it's use of a compander chip. Seemed kind of silly to do companding on a fairly low bit depth signal.. plus ive just never been a fan of companders anyways... at least for this sort of use... seems like there is always a compromise of making them turn on and off at a certain speed. Too slow, and it sounds kind of dead. too fast and extended repeats get kind of choppy.

blah
anyways
i typed way more stuff on here than i meant to.

[Skreddy]

It is my understanding that the application note for the PT2399 does not mention bit depth because it does not use any bit depth, per se, but rather a 1-bit stream. It is sampled at such a high rate, that the 1-bit impulses are easily converted back to the audio signal with an integrator circuit. Here's a graphic of what that looks like (from http://upload.wikimedia.org/wikipedia/en/2/20/Pulse-density_modulation_1_period.gif):
http://upload.wikimedia.org/wikipedia/en/2/20/Pulse-density_modulation_1_period.gif

If the clock speed is 3 MHz when the delay is storing the data for 228ms (as per the application note), then...

228 ms * 3,000,000 Hz = 684,000 bits

684,000 bits / 44K bytes = 15.5454... bits per byte

Strange number of bits per byte. Some of the bits are used for housekeeping functions, but only slightly less than once every other byte. But since it doesn't use a byte-based data format anyway, this shouldn't upset us too much.

[sliding-tom]

You're giving me a headache, Skreddy! :D

[Brian Marshall]

It is my understanding that the application note for the PT2399 does not mention bit depth because it does not use any bit depth, per se, but rather a 1-bit stream. It is sampled at such a high rate, that the 1-bit impulses are easily converted back to the audio signal with an integrator circuit. Here's a graphic of what that looks like (from http://upload.wikimedia.org/wikipedia/en/2/20/Pulse-density_modulation_1_period.gif):
http://upload.wikimedia.org/wikipedia/en/2/20/Pulse-density_modulation_1_period.gif

If the clock speed is 3 MHz when the delay is storing the data for 228ms (as per the application note), then...

228 ms * 3,000,000 Hz = 684,000 bits

684,000 bits / 44K bytes = 15.5454... bits per byte

Strange number of bits per byte. Some of the bits are used for housekeeping functions, but only slightly less than once every other byte. But since it doesn't use a byte-based data format anyway, this shouldn't upset us too much.


Hey Marc,

You must be right, and delta sigma modulation would make the internal schematic make a bit more sense. All the innerworkings of delta sigma converters I've seen were always drawn as logic diagrams, and filter blocks, so i didnt really recognize it in the internal schematic on the datasheet.

Anyways, I got the 10 bit information directly from PT years ago. I emailed them about the chip.. Back then the only data sheet i could find was only 4 pages, and had even less information. They sent me a more detailed pdf, which is not a bit more available on the net, and emailed me a few specs inculding typical current draw, a few other things, and said the bit depth was 10. Perhaps it was a typo and they meant 1. But what is really odd, is that a number of people on arons forum refered to it as 10 bit as well back then.. perhaps they were sending out a blanket email to everyone with incorrect info.

As far as the math goes, I'd agree that it should come out to an interger, but 44KB is a rather odd amount of ram considering that most external ram usually comes out to a perfect square. I just assumed that PT fit as much ram on the die as they could, and approximated that spec... especially since they dont tell you whether they are calling a byte 10 or 8 bits... of course we can assume that is a moot point now. I thought that since the delay line was probably serial rather than parallel, they very well may be using start and stop bits as well, and using the extra clock cycles to build the data in to a parallel byte...

Of course this also makes my objective complaint about using companders with this IC moot as well... but the subjective complaint is still stands... at least in terms of the 570/571 chips.

Of course, in the case of delay pedals you don't usually want hifi reproction anyways.

The reasons i chose to design around this chip had little to do with the specs though. Over the past couple years, i've prototyped a number of delay pedals including an MN3205 based delay. The limit in delay length with that one was too overwhelming, and i didnt really want to use two chips, and not matter what i did i felt like i couldnt get away from the sound of a DM2 or AD9, which i really didnt want... I also built a PT80, and another modded PT80. I breadboarded the schematic straight out of the datasheet with input and output buffers added. I chose the pt2399 for both subjective and practical reasons. The only benefit i could find with the MN3205 is that I could say the product was analog.